In a earlier article, Getting began in structured meeting in complicated SoC designs, an unexceptional system-on-chip (SoC) design was proven to comprise a whole bunch of mental property (IP) blocks. Additionally, it was demonstrated how connections between these IP blocks might contain a whole bunch or 1000’s of ports with a number of tie-off choices.
Some IP blocks might come from third-party suppliers, whereas others are developed internally. The issue is that any of those blocks might expertise revision adjustments all through the course of design. That is very true of internally developed IP, which can endure a number of revisions attributable to evolving specs and necessities. Managing these adjustments because the design evolves can shortly grow to be a nightmare.
Why do issues change?
The traditional Greek thinker Heraclitus of Ephesus (535-475 BC) famously famous: “The one fixed in life is change.” In relation to the IP blocks forming an SoC, the purpose is to make the method of change as simple as attainable (Determine 1).
Determine 1 The purpose is to make change in IP blocks clean. Supply: Arteris IP
Within the case of IP from third-party distributors, adjustments throughout a selected mission are comparatively uncommon. One exception is when the design staff detects and experiences a bug or different problem, and the seller responds by producing a brand new revision of the IP to deal with the issue. One other situation is when it turns into obligatory to switch an IP from one vendor with an equal IP from one other vendor, which—amongst different issues—might necessitate adjustments on the interface.
By internally producing IP, change—particularly within the early phases of the design—is the conventional modus operandi. In lots of circumstances, an IP block begins out as a stub within the type of a black field with port definitions. Because the design progresses, increasingly more particulars are added, finally ensuing within the accomplished IP. Even then, adjustments to the IP, together with modifications to the interfaces, might persist lengthy into the event course of.
An SoC design is often represented as a hierarchical netlist of blocks, with the bottom degree being the IP blocks themselves. This netlist is captured in a {hardware} description language (HDL) similar to Verilog or VHDL on the register-transfer degree (RTL) of design abstraction.
Historically, this netlist has been created by hand utilizing an extensible and customizable textual content editor like VI or GNU Emacs. Though some die-hard designers nonetheless use this strategy, the truth that a single IP block instantiation might now contain a thousand connections and span a whole bunch of traces of code implies that it’s turning into more and more untenable.
If the netlist is hand-crafted, it may be onerous sufficient to replace a single IP instantiation. The issue is barely exacerbated when a number of instantiations of the identical block exist. The result’s that implementing IP adjustments by hand is time-consuming and susceptible to error, growing danger, degrading productiveness, and impacting time to market (TTM).
Managing change in IP
The foundational step to managing change is for the hierarchical RTL netlist to be described in such a method as to facilitate meeting, refinement and replace via abstraction and automation. That is achieved through the use of the IP-XACT customary, which is available in an XML-based format. IP-XACT was initially developed by The SPIRIT Consortium, which subsequently merged with Accellera, and the usual is now supported as IEEE 1685.
A number of corporations have developed inner, proprietary instruments that make use of IP-XACT. One strategy for managing IP change is to make use of instruments like Magillem IP Deployment Expertise. Within the case of IP blocks acquired from third-party distributors, these blocks will sometimes come provided with a corresponding IP-XACT mannequin. If not, such a mannequin will have to be created. Equally, within the case of internally generated IP blocks, every block would require an related IP-XACT mannequin. Sadly, the IP-XACT customary is complicated and unfamiliar to many. Nonetheless, the instruments can be utilized to learn an current RTL illustration of an IP block and robotically generate the corresponding IP-XACT mannequin. As a part of this, customers can add management and standing registers (CSRs) to legacy IPs.
If members of the design staff create the top-level hierarchical netlist by hand, this may be learn by Magillem, which may robotically create a hierarchical graphical illustration of the design. Alternatively, if the design staff begins with a clear slate, the instruments can be utilized to show the gathering of IP blocks accessible. The customers can make use of a drag-and-drop interface to seize the design hierarchy and place and join the specified blocks. The device can then generate a correct-by-construction RTL netlist of the design.
However that is simply the beginning. What makes instruments like this highly effective is that it’s attainable to create scripts related to particular person blocks of IP, hierarchical blocks, and the design as an entire. These scripts, which may be in Python, Tcl (pronounced “tickle”) or Java, could also be captured utilizing an everyday textual content modifying device. Alternatively, clicking on a block within the graphical view of the design permits the consumer to create or edit a script related to that block (Determine 2).
Determine 2 Scripts may be related to IP blocks, hierarchical blocks, or the design as an entire. Supply: Arteris IP
Along with Magillem’s utility programming interface (API), these scripts may be instructed to carry out duties like updating model X.X of an IP block with X.Y. Moreover, a script can be utilized to replace all situations of the identical block. That is related in idea to a “search and substitute” perform in an editor, besides that the device additionally performs acceptable checks, similar to making certain that the ports nonetheless match. If any issues are detected, the consumer is alerted and supported by instruments that assist in addressing the problems. An much more highly effective function is that scripts can name different scripts as required.
Simulation and verification
The mix of Magillem’s API and scripting capabilities goes far past managing change. Within the case of simulation, for instance, it is not uncommon to have a number of representations of every IP block, from a easy stub to a full-blown implementation with the potential for a number of limited-function implementations.
Historically, choosing between these numerous representations has been carried out utilizing “ifdef” kind statements embedded within the netlist to manage the compiler. Though this sounds easy, truly using this strategy to outline a number of views of a posh SoC can shortly grow to be unwieldy. The choice is to make use of scripts to carry out duties like “swap out illustration X with Y.”
Equally, though the main focus of this text has been on the administration of design IP, these strategies can be utilized to managing related verification IP.
Adoption of IP-XACT instruments
As SoC designs have continued to evolve in measurement and complexity—with many gadgets that includes a whole bunch of IP blocks and tens of 1000’s of connections—creating and sustaining the hierarchical RTL netlist by hand is now not tenable.
Along with rushing the era of the preliminary netlist and making certain a correct-by-construction design, the API and scripting amenities offered by IP-XACT-based instruments like Magillem facilitate managing adjustments to the IP all through the event course of. The goal is to hurry improvement, enhance productiveness, scale back danger, and reduce time to market.
Ryan Y. Chen is discipline purposes engineering supervisor at Arteris IP.
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