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SK hynix DRAM Product Planning Spearheads the Reminiscence Evolution within the Submit-HBM3 Period


By
Sungsoo Ryu, Head of DRAM Product Planning & Sunghak Lee, Technical Chief of In-Bundle Reminiscence (IPM) Product Planning 

07.27.2022

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Of their earlier EE Occasions article, Sungsoo Ryu and Sunghak Lee, Head of SK hynix DRAM Product Planning and Technical Chief of SK hynix IPM Planning, defined how HBM3 helps to fulfill greater DRAM and reminiscence calls for. Teaming up for a second time, Ryu and Lee focus on how their groups match into SK hynix’s future plans.

Regardless of the continuing debate over the validity of conventional rules, together with Moore’s Legislation and reminiscence wall disparity, the overall consensus within the semiconductor subject is that the worth proposition of the reminiscence trade over the course of the years have been for probably the most half well-oriented to system-level necessities, serving to to raise system efficiency past present efficiency caps. Backed by research in superior applied sciences and options, the reminiscence trade has dug deeper into the realm of the unknown and labored in direction of back-to-back “world’s first” and “world’s finest” improvements, bringing advantages to the IT sector as an entire.

Nonetheless, it’s changing into clearer that reminiscence efficiency progress, usually represented by reminiscence bandwidth, is reaching an inflection level resulting from rising doubts concerning the system-level sustainability of anticipated memory-level trade-offs, reminiscent of energy, thermal and space overheads. This concern is finest exemplified by the HBM trade, which sits on the pinnacle of each the system and reminiscence efficiency hierarchy, and undisputed expertise drivers of next-generation purposes, together with supercomputers, high-performance computing, autonomous driving and machine studying. Whereas reminiscence suppliers insist that sure ranges of energy, thermal and space prices are inevitable to safe the required efficient bandwidth efficiency, proponents of the system-on-chip (SoC) trade argue that the extent of trade-offs needs to be maintained on the minimal contemplating fastened system-level budgets.

Determine 1. HBM Velocity vs. Energy Commerce-off Pattern

Such conflicting views have propelled the demand on either side for trade management that might preemptively set tentative reminiscence roadmaps and expertise milestones as a beacon for higher reminiscence development visibility, in addition to drive trade efforts to safe breakthrough options by shifting course from the normal evolutionary path to unconventional technique of defining new reminiscence structure and requirements. SK hynix, at present the undisputed chief of the HBM trade, has set the tempo for profitable HBM product launches lately, because of the event of the first-of-its-kind HBM2E and HBM3 in 2019 and 2021, respectively, together with the latest public announcement of HBM3 product shipments to NVIDIA.

On this facet, the trade is wanting in direction of SK hynix DRAM Product Planning to take the lead by initiating trade collaboration and partnerships that may permit for future excessive bandwidth reminiscence roadmap deliveries aligned to the necessities of worldwide clients and companions primarily based on the world’s quickest and highest performing HBM line-ups. Answering such trade calls, SK hynix DRAM Product Planning has set the tempo in direction of pushing the HBM ecosystem to ship a brand new HBM line-up roughly each two years. SK hynix believes that the tentative two-year cadence roadmap will considerably contribute to sustaining the system-level developments and increasing present efficiency boundaries primarily based on the highest-value purposes.

To keep up such long-term roadmap technique and technological developments, SK hynix DRAM Product Planning is driving each inner and exterior efforts to increase the set borderlines in HBM pace, density, energy and space. At the beginning, to beat pace limitations, SK hynix is evaluating the professionals and cons of the normal technique of extending knowledge price per pin, in addition to the I/O bus width past x1024 for higher knowledge parallelism and backward design compatibility; in different phrases, greater bandwidth efficiency with minimal trade-offs. To accommodate the upper reminiscence density necessities for larger knowledge units and coaching workloads, SK hynix is initiating research on extending the variety of die stacks and the bodily stack peak, in addition to core die density elevated for an optimized stack density.

SK hynix can also be pushing to enhance energy effectivity (pJ/bit), which is able to reduce absolutely the energy consumption per bandwidth extension by assessing reminiscence structure and operation schemes from the bottom micro-architectural stage up the very best die stack idea. Understanding the significance of minimizing the full reminiscence die dimension due the bodily limitations of the present interposer reticle dimension and different related applied sciences that maintain each the processing unit in addition to HBM cubes, SK hynix is striving to protect these present bodily dimensions whereas concurrently rising the variety of cells and options that lead to total efficiency jumps. The premise of such duties is centered across the dedication of SK hynix to all HBM utilization extension past present techniques to potential next-generation purposes by means of joint partnerships and open collaboration with ecosystem companions.

Determine 2. HBM Efficiency Elements

Alas, the talk continues on what the ultimate optimum efficiency targets are, how one can safe breakthrough options that will fulfill all associated events, and what the suitable give-and-takes could be. These discussions are inevitable and have to be resolved to ensure that the two-year HBM roadmap cadence to grow to be a actuality.

Understanding the significance of co-operation and communication with associated events to keep up the driving efforts of the long run roadmap technique and technological developments, SK hynix DRAM Product Planning is working extra carefully than earlier than with key SoC, ASIC (application-specific built-in circuit), CSP (cloud resolution supplier), OSAT (outsourced semiconductor meeting and check), foundry, PHY & IP and different companions to sort out present technical points whereas creating new vital values for not solely the semiconductor trade progress itself, however within the facet of tackling environmental and social values as a accountable expertise firm.

Determine 3. SK hynix’s Imaginative and prescient for HBM Open Collaboration Platform

Be taught extra.



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