Qualcomm had come to my College for 2 roles – {Hardware} and Software program. I utilized for {Hardware} Function. There was one spherical of on-line assessments and a couple of interview rounds.
Spherical 1 (On-line Take a look at): It consisted of three sections with 20 questions in every part and 30 minutes per part. You possibly can journey by means of the questions in a specific part. The marking scheme was +1 for the right reply and -0.25 for the fallacious reply. Roughly 1500 folks gave the take a look at for each software program and {hardware} position.
- The primary part was aptitude questions which concerned simple to medium-difficulty logical, aptitude, and easy math-based questions.
- The second part was primarily based on C programming and had output-based MCQs together with some quantity system questions.
- The third part had a selection between CS and Digital. I chosen the Digital part as I had utilized for the {Hardware} position. It consisted of Digital Electronics with questions from Combinational and Sequential circuits, Boolean algebra, CMOS, BJT, ADC, DAC, and so forth.
After 2 days of the web take a look at, round 35 folks had been chosen for the interview course of.
Spherical 2 (Interview 1): This was a technical interview and it went on for round 50 minutes. It was performed on-line on Microsoft Groups. I had a clean piece of paper prepared with me for writing down/drawing solutions for some questions in addition to performing tough work. The interview coated various subjects and the questions requested within the interview had been:
- A couple of questions on my resume.
- Draw switch traits of the inverter.
- What’s the threshold voltage of an inverter?
- What’s excessive and low Noise margin? What does it signify
- Draw the CMOS inverter and mark all 4 terminals.
- Draw a bodily diagram of an NMOS.
- What occurs if the physique shouldn’t be shorted to the supply? What may occur whether it is related to a better voltage than the supply?
- What are state machines?
- Write the Verilog code for a mod-3 counter.
- What are the frequent errors one could make whereas scripting this Verilog code?
- How would you make an AND gate with a 2×1 MUX?
- How would you make an OR gate with an XOR gate?
I used to be in a position to reply virtually all questions barring just a few. A couple of folks had been eliminated after this spherical.
Spherical 3 (Interview 2): This was additionally a technical interview primarily aside from just a few discussions about location preferences. This once more was performed on-line on Microsoft Groups, the identical day as the primary interview. It lasted for about 35-40 minutes. The questions requested had been:
- Requested just a few basic and private questions on me and my resume.
- A logical aptitude-based query – In case you have 2 cubes with 6 surfaces every, how will you show any day of a month from 01 to 31 utilizing the two cubes by writing any single digit quantity on all sides of each the cubes?
- Implement an OR gate utilizing NAND gates.
- Draw an OR gate utilizing a 2×1 MUX.
- What’s the equation of an EXOR gate?
- Draw a NAND gate utilizing CMOS logic.
- Clarify the way it capabilities.
- What are the setup time and maintain time?
- What are the several types of Finite state machines? What’s the distinction?
- Draw the state diagram of a sequence detector to detect – 01*0010*1 – the place 1* signifies that 1 might be repeated any variety of instances and equally 0*.
- Verbally clarify how you’ll write a Verilog code for a finite state machine.
- Discussions relating to job location.
After the second spherical, there was no additional HR spherical for any of the candidates. The identical day we obtained the ultimate outcomes of the method and in complete 8 folks had been chosen for an Internship + Full-time provide. Out of those, 4 had been for {Hardware} and 4 had been for Software program.
