Alongside at this time’s disclosure of the Rialto Bridge accelerator, Intel can be utilizing this week’s ISC occasion to ship a short replace on Sapphire Rapids, the corporate’s next-generation Xeon CPU which is transport later this yr. Whereas Intel has been beating the drum for his or her forthcoming, 4th Technology Xeon Scalable chip for some time, we’ve but to listen to something of significance about its anticipated efficiency – notably within the HPC house. So forward of its formal launch a bit later this yr, Intel is lastly speaking a bit concerning the anticipated efficiency of the HBM-equipped model of the chip, which is aimed particularly on the HPC/supercomputing crowd.
Intel’s first tiled Xeon processor, Sapphire Rapids can be Intel’s first CPU to supply non-obligatory on-chip HBM reminiscence, which is being dubbed Sapphire Rapids Plus HBM. The addition of 64GB of HBM2e makes it a reasonably advanced and costly chip, but additionally one with entry to much more reminiscence bandwidth than any x86 CPU earlier than it. In consequence, the chip is of explicit curiosity to a subset of the high-performance compute group, because it affords another route for workloads that aren’t appropriate for GPUs, however nonetheless want entry to huge quantities of reminiscence bandwidth.
As a part of their ISC presentation at this time, Intel is releasing two slides with efficiency figures for the HBM model of Sapphire Rapids (Sapphire Rapids Plus HBM). The thought right here is to point out off the mix of structure enhancements – and particularly, the devoted accelerator blocks – mixed with utilizing 64GB of HBM2e reminiscence to maintain these blocks effectively fed. The pre-production processors are being in comparison with Intel’s Xeon Platinum 8380 (Ice Lake-SP) chips.
Taking into consideration that these are going to be cherry-picked efficiency figures, Intel is seeing anyplace between a 2x speed-up in issues just like the WRF climate forecasting mannequin, to over a 3x enchancment for the CloverLeaf Euler equation solver. Each of that are considerably slender use circumstances, however necessary ones for the HPC market section.
Sapphire Rapids Plus HBM is because of be launched alongside the remainder of the Sapphire Rapids household later this yr. In line with Intel’s present roadmaps, it’s due for a successor within the 2023 timeframe, earlier than your entire HBM-equipped Xeon lineup is because of be rolled into the Falcon Shores XPU in 2024.
