Seven years after its $16.7 billion acquisition of FPGA maker Altera, Intel is increasing the expertise it gained into new areas.
Whereas the first use for an FPGA processor has been for smartNICs that offload duties from server CPUs, Intel is now trying to broaden its utility from the information middle to distant, edge computing, and embedded methods.
It’s not as if the Altera processors languished during the last a number of years, nonetheless. One main change is manufacturing. When Intel bought Altera, its chips have been made by TSMC. Now they’re made by Intel, so hopefully that’s one much less supply-chain headache to fret about.
“Provide has simply turn out to be crucial,” stated Patrick Dorsey, vp of Intel’s information middle and AI group and common supervisor of the programmable options group. “The primary function out there is ‘do you’ve got my half?’ So having the provision chain is simply going to turn out to be crucial.”
As for the chips, Intel outlined a roadmap that breaks down the brand new and future FPGAs into 4 separate product classes, all beneath the Agilex model title.
Agilex D-Collection
The brand new Agilex D-Collection FPGAs be a part of the older Cyclone, Arria, and Stratix manufacturers within the midrange house. The D-Collection shall be bodily smaller total, with decrease thermal necessities and a lower cost.
Dorsey says the D-Collection shall be offered to be used in areas equivalent to 5G baseband radios, embedded functions such because the medical instrument trade, and manufacturing. The D-Collection may also discover its approach into the information middle through functions equivalent to storage acceleration, the place the FPGA would deal with information motion as an alternative of the CPU, based on Dorsey.
Multi-chip FPGA packages
The second product line consists of Agilex FPGAs with assist for Compute Specific Hyperlink (CXL) and PCIe 5. Designed for demanding processor workloads, these may also discover a dwelling in information facilities for community processing. This line of FPGAs will function a multi-chip package deal – you will see the FPGA paired with an ASIC, a CXL chip, and PCIe 5, all in a single package deal tied collectively by high-speed interconnect.
This shall be a part of Intel’s smartNIC, or as Intel calls it, the infrastructure processing unit (IPU) technique.
One purpose for the multichip package deal technique is that it permits Intel to improve items of the chip with out requiring a full revision. The preliminary Agilex FPGAs this yr will include CXL 1.2 assist, for instance. However subsequent yr, they are going to be upgraded to CLX 2.0. With this design, Intel can merely substitute the CXL part within the package deal with out having to revamp and remake your complete chip.
Sundance Mesa
One other a part of Intel’s information middle technique focuses on synthetic intelligence and supporting AI functions each inside the community in addition to on the sting. The Sundance Mesa line of recent FPGAs will include superior AI capabilities associated to INT8 processing, which is used for the inference portion of AI.
“You are not going to do coaching in an FPGA, however you are able to do actually quick inference, and you may innovate actually rapidly with that programmable material,” stated Dorsey.
Intel Direct RF portfolio
The ultimate product line is the Intel Direct RF portfolio, that are processors devoted to analog and RF signaling functions.
One other “large focus” for Intel is builders, based on Dorsey. FPGAs are notoriously troublesome to write down apps for, he says. So Intel has greater than 35% of its engineering staff creating software program to take the load of writing primary code off builders. Intel can also be making compilers and different improvement instruments out there, and it is together with FPGA in its oneAPI technique, which Intel designed to simplify programming by creating one API that helps a wide range of processors, from CPU to GPU to FPGA and extra.
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