Location: Bengaluru
Firm: Intel
Job Description
Performs logic design, Register Switch Stage (RTL) coding, and simulation to generate cell libraries, useful items, and subsystems for inclusion in full chip designs. Participates within the improvement of Structure and Microarchitecture specs for the Logic elements. Offers IP integration help to SoC clients and represents RTL crew.
{Qualifications}
Data of Verilog system Verilog, DC., ICC, and PrimetimeUnderstand of tradeoff and design optimization method between efficiency energy and space common scripting and programming expertise (Python, Perl, C/C++)Formal verification expertise could be plus
