Monday, August 15, 2022
HomeElectronicsUnique CEO Interview: Newest Funding Drives Ventana’s First RISC-V Chiplets in Information...

Unique CEO Interview: Newest Funding Drives Ventana’s First RISC-V Chiplets in Information Facilities


//php echo do_shortcode(‘[responsivevoice_button voice=”US English Male” buttontext=”Listen to Post”]’) ?>

Balaji Baktha - Ventana Micro Systems
Balaji Baktha (Supply: Ventana Micro Methods)

Ever since Ventana Micro Methods got here out of stealth final 12 months, the corporate has been busily growing relationships with companions and potential prospects to create traction for its RISC-V–based mostly chiplets, which it believes will deal with the high-performance computing calls for in knowledge facilities and on the edge.

Now, the corporate has raised $55 million in new funding to productize its chiplets based mostly on open commonplace die–to–die (D2D) interfaces.

The joy and enthusiasm Balaji Baktha, founder and CEO of Ventana, has for chiplets fixing the computing challenges created by the calls for in knowledge heart, automotive, and 5G may be very obvious. EE Instances heard it firsthand, in an unique interview with the CEO on the latest 59th Design Automation Convention (DAC) in San Francisco.

At DAC, he mentioned he believed this was being mirrored out there, too—particularly round open supply and RISC–V, the latter being one thing Intel Foundry Providers (IFS) has been pushing rather a lot (see “DAC 2022: Digital twins and the door to the metaverse”).

“DAC was all about the way you allow the subsequent wave of compute density,” he mentioned. “It was about chiplets, about open compute and open {hardware}, and RISC–V. With UCIe (Common Chiplet Interconnect Specific) now starting to take form, Ventana is working intently and strategically with Intel to carry UCIe–based mostly chiplets to market. The newest funding will enable us to get there, and we count on tape out of our first UCIe chiplet merchandise within the second half of 2023.”

The UCIe is an open specification that goals to outline the interconnect between chiplets inside a package deal, enabling an open chiplet ecosystem and ubiquitous interconnect on the package deal stage (see Chiplets Get a Formal Customary with UCIe 1.0). The founding members of the UCIe consortium embody AMD, Arm, Superior Semiconductor Engineering, Inc. (ASE), Google Cloud, Intel Company, Meta, Microsoft, Qualcomm, Samsung, and TSMC. Alibaba and Nvidia joined the consortium this month.

“We might be one of many first out there to productize chiplets for UCIe, and we’re working intently with Intel to make these out there,” Baktha mentioned.

Supporting this imaginative and prescient, Bob Brennan, VP of buyer options engineering at IFS, mentioned, “RISC–V presents a stage of scalability and customization that’s distinctive within the trade. We’re seeing sturdy demand from our prospects to assist excessive–efficiency RISC–V options.”

A chiplet-based SoC permits every chiplet to be carried out in its optimum course of node, and supplies scalable computing, workload acceleration, and I/O. (Supply: Ventana Micro Methods)

On the chiplet progress, he added, “Ventana has essentially the most full and effectively developed open chiplet–based mostly platform, which is effectively aligned to Intel’s imaginative and prescient. Ventana’s chiplets allow IFS to ship modular options that improve efficiency, scale back energy, scale back improvement value and speed up time to market.”

Buyer traction

What sort of traction is Ventana receiving? And what was it that satisfied buyers to place one other $55 million into the corporate?

Ventana introduced in new buyers that opened the door to key markets in Asia, notably to Taiwan, Korea, and Japan, Baktha mentioned, declining to call the of 4 new buyers.

By way of market take up, he defined the extent of pleasure for Ventana’s resolution may be very sturdy in hyperscalers, notably in China, but in addition within the U.S. In the meantime in Europe, there’s vital curiosity for RISC–V chiplets in excessive–efficiency computing.

“China is driving our progress based mostly on the urge for food for RISC–V, and particularly since they’re in search of server–class product,” he mentioned. “In China, it’s all about knowledge facilities, and we’re working with all the important thing hyperscaler corporations there, with all of them eager about RISC–V chiplets. One giant cloud supplier will certainly be going with RISC–V based mostly on what they’ve seen, and we’re working with a hyperscaler in China on infrastructure options, the place they wish to deploy RISC–V in servers.”

Within the U.S., Baktha mentioned the primary large deployment success might be in knowledge heart infrastructure within the second half of 2023.

It’s not simply the information heart that Ventana is seeing curiosity from. Baktha mentioned that one automotive producer is “deeply engaged” with the corporate to develop a subsequent–era ADAS (superior driving help system) processor.

“They acknowledge that RISC–V will improve their differentiation, so they’re working with us on the deep microarchitecture,” he mentioned. “We see related curiosity from a big participant within the Far East.”

In different areas, Ventana has made severe inroads into key 5G Open RAN gamers who’re transitioning their chipsets [to RISC–V], in addition to shopper units, equivalent to Chromebooks, he added.

In abstract, Ventana has been eager to display that it’s concentrate on RISC-V–based mostly chiplets might be key in addressing a few of the HPC challenges confronted in knowledge facilities, automotive, and 5G. As Patrick Moorhead, CEO and chief analyst at Moor Insights & Technique, mentioned earlier this 12 months, “Chiplets are the place the semiconductor trade is headed as they supply excessive efficiency, limitless flexibility, and time–to–market benefits.”



RELATED ARTICLES

LEAVE A REPLY

Please enter your comment!
Please enter your name here

- Advertisment -
Google search engine

Most Popular

Recent Comments