Let’s be frank: it was a nice shock when AMD’s Radeon RX 6000-family graphics playing cards have been capable of present strong competitors for (and even outpace, at instances) NVIDIA’s GeForce RTX 3000 collection. The RX Vega collection, whereas competent, did not dwell as much as its promise, and the first-generation RDNA-based Radeon playing cards within the RX 5000 collection have been a bit of underwhelming owing to their midrange focus.
The discharge of “Large Navi” modified all that, but it surely’s trying like NVIDIA’s subsequent technology of GPUs might be even larger and extra beastly than Ampere regardless of being named after a high-class girl. In accordance with rumors, AMD plans to reply in variety, with an excellent larger Navi GPU that goals to go face to face in opposition to Woman Lovelace.
The most recent info appears to verify that rumor. As a part of the exact same replace to its Linux drivers that we checked out on Monday, AMD itself has leaked what appears to be the reminiscence configuration of its top-end RDNA 3 GPU, presumably the chip behind the Radeon RX 7900 XT. That configuration: six 64-bit MCDs, every with 32MB of SRAM, for a large 384-bit reminiscence bus and a few 192 MB of Infinity Cache.
In case you’re questioning what an MCD is, it is a separate die that features cache, a GDDR6 reminiscence interface, and probably exterior I/O for an RDNA 3 GPU. In case you’ve been actually out of the loop recently, AMD’s confirmed that its next-gen Radeons might be constructed utilizing chiplets like its Ryzen CPUs.
Many individuals have envisioned a GPU with a number of chiplets being tough to construct owing to the problem of splitting up a graphics workload throughout discrete processors, but it surely’s seeming extra probably that AMD will stay utilizing a single GPU compute chiplet with a number of cache, reminiscence, and I/O chiplets. That is a a lot simpler configuration to handle, even when it does not give the identical advantages for manufacturing as a multi-die GPU.
This info was identified by Kepler on Twitter, who additionally had some attention-grabbing observations to make concerning the Infinity Cache allotment on RDNA 3 GPUs. As with RDNA 2, it appears to be roughly 16MB of Infinity Cache per 32-bit reminiscence channel, a minimum of at a most. Nonetheless, Kepler appears to suppose that AMD is ready to double that allotment utilizing 3D V-Cache. By stacking a second 32 MB SRAM die on high of every MCD, the most important Navi 3x components may find yourself with as a lot as 384 MB of Infinity Cache.
It is superb to consider a GPU with 384 MB of on-package cache when it wasn’t all that way back that we have been utilizing GPUs with lower than 1GB of complete VRAM on the board. An enormous cache like that ought to actually alleviate the efficiency issues that extant RDNA 2 GPUs undergo when working in very excessive resolutions like UHD 4K.
